1. Field of the Invention
The present invention relates to an accumulation-mode MOSFET and a driving method thereof.
2. Description of the Related Art
In recent semiconductor integrated circuit apparatuses (to be also referred to as “LSI apparatuses” hereinafter), an enormous number (109 to 1012) of functional elements such as transistors are integrated at high density along with development of a micropatterning technique. The power consumption of such apparatus is large, and thus the apparatus is becoming unsuitable for the recent energy saving trend.
To reduce the power consumption of the LSI apparatus, it is essential to decrease its power supply voltage. This is important not only in the semiconductor field but also in the semiconductor integrated product field, and is an urgent matter. To decrease the power supply voltage of the LSI apparatus, it is necessary to decrease the power supply voltage of an MOSFET (Metal-Oxide-Semiconductor Field-Effect-Transistor) as a main electronic component of the LSI apparatus as much as possible. At the same time, it is an important issue to sufficiently improve the current driving capability upon power-on. To do so, it is necessary to increase the ratio between drain currents upon power-off (0 V) and power-on (power supply voltage) of the MOSFET, thereby decreasing a threshold voltage as much as possible.
To improve the current driving capability, an accumulation-mode MOSFET (to be also referred to as an “A-mode MOSFET” hereinafter) is more advantageous than a so-called inversion-mode MOSFET (to be also referred to as an “I-mode MOSFET hereinafter) (Impact of Improved High-Performance Si(110)-Oriented Metal-Oxide-Semiconductor Field-Effect Transistors Using Accumulation-Mode Fully Depleted Silicon-on-Insulator Devices. W. Cheng et al., Jpn. J. Appl. Phys., vol. 45, p. 3110, 2006. (NPL 1) and Performance Comparison of Ultrathin Fully Depleted Silicon-on-Insulator Inversion-, Intrinsic-, and Accumulation-Mode Metal-Oxide-Semiconductor Field-Effect Transistors. R. Kuroda et al., Jpn. J. Appl. Phys., vol. 47, p. 2668, April 2008. (NPL 2)).
In the A-mode MOSFET described in NPLs 1 and 2, however, carriers move by thermionic emission and thus an S value (a gate voltage for increasing the drain current by an order of magnitude) is 60 mV/dec or larger (room temperature).
To the contrary, there is a case in which an S value of 46 mV/dec is achieved by a structure that performs tunnel electron emission (Si Tunnel Transistors with a Novel Silicided Source and 46 mV/dec Swing. J. Kanghoon et al., in 2010 Symposium on VLSI Technology, 201, p. 121. (NPL 3)). In the example described in NPL 3, although an S value of 46 mV/dec is achieved, the current driving capability upon power-on is incomparably smaller than that of a general thermionic emission type.